High voltage semiconductor device including buried oxide layer
US12328898B2 · kind B2 · utility
0Cited by
6References
10Claims
0Family size
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Key dates
| Filing date | Jun 7, 2024 |
| Grant date | Jun 10, 2025 |
| Priority date | — |
| Expiry date | Jun 7, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/013
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a buried oxide layer in the substrate and near a surface of the substrate, a gate dielectric layer on the substrate and covering the buried oxide layer, a gate structure disposed on the gate dielectric layer and overlapping the buried oxide layer, a source region and a drift region in the substrate and respectively at two sides of the gate structure, wherein the drift region partially covers a lower edge of the buried oxide layer and exposes a side edge of the buried oxide layer, and a drain region in the drift region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.