System and method for automatic fault detection in an electronic design
US12332304B1 · kind B1 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2022 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Aug 24, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments include herein are directed towards a method for automatic detection during a timing analysis. Embodiments may include reading, using a processor, design and power intent information associated with an electronic design and automatically identifying a plurality of inter-power domain paths from the design and power intent information. Embodiments may further include automatically filtering the plurality of inter-power domain paths to identify one or more faulty inter-power domain paths using a graph-based approach and automatically generating a report depicting the one or more faulty inter-power domain paths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.