Inventor · Santa Clara, CA, US

Naresh Kumar

44Patents
8h-index
99Co-inventors
78Inventor score

Filing activity: Dec 20, 1989 → Dec 21, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US8788995B1 System and method for guiding remedial transformations of a circuit design defined by physical implementation data to reduce needed physical corrections for detected timing violations in the circuit design Physics 43 Active
US8863052B1 System and method for generating and using a structurally aware timing model for representative operation of a circuit design Physics 36 Active
US9875333B1 Comprehensive path based analysis process Physics 36 Active
US8239798B1 Methods, systems, and apparatus for variation aware extracted timing models Physics 31 Active
US10776547B1 Infinite-depth path-based analysis of operational timing for circuit design Physics 14 Active
US11343247B1 Local delegation of remote key management service Electricity 11 Active
US9589096B1 Method and apparatus for integrating spice-based timing using sign-off path-based analysis Physics 10 Active
US8938703B1 Method and apparatus for comprehension of common path pessimism during timing model extraction Physics 9 Active
US10255403B1 Method and apparatus for concurrently extracting and validating timing models for different views in multi-mode multi-corner designs Physics 8 Active
US10915685B1 Circuit stage credit based approaches to static timing analysis of integrated circuits Physics 7 Active
US8635660B2 Dynamic constraints for query operations Electricity 6 Active
US9633159B1 Method and system for performing distributed timing signoff and optimization Physics 6 Active
US9405882B1 High performance static timing analysis system and method for input/output interfaces Physics 5 Active
US9529962B1 System and method for generating and using sibling nets model for shared delay calculation across multi-instantiated blocks in the circuit design Physics 4 Active
US9727676B1 Method and apparatus for efficient generation of compact waveform-based timing models Physics 4 Active
US4986517A Apparatus for pouring molten metals Performing Operations; Transporting 4 Expired
US10114920B1 Method and apparatus for performing sign-off timing analysis of circuit designs using inter-power domain logic Physics 3 Active
US4995593A Crucible having a movable dross collector comprising an induction coil Electricity 3 Expired
US6932300B2 Device for closing parachute packs Performing Operations; Transporting 1 Expired
US10686904B2 System and method for pushing smart alerts Electricity 1 Active
US9667777B1 Automated bulk provisioning of primary rate interface and SIP trunk telephone numbers Electricity 1 Active
US9843645B2 System and method for pushing smart alerts Electricity 1 Active
US7945960B2 Dynamic conditional security policy extensions Electricity 1 Active
US11455450B1 System and method for performing sign-off timing analysis of electronic circuit designs Physics 1 Active
US10783300B1 Systems and methods for extracting hierarchical path exception timing models Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.