Coreless electronic substrates having embedded inductors
US12334242B2 · kind B2 · utility
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14Claims
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Key dates
| Filing date | Mar 11, 2021 |
| Grant date | Jun 17, 2025 |
| Priority date | — |
| Expiry date | Sep 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F2017/0066
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An inductor can be formed in a coreless electronic substrate, such that the fabrication process does not result in the magnetic material used in the inductor leaching into plating and/or etching solutions/chemistries, and results in a unique inductor structure. This may be achieved by forming conductive vias with a lithographic process, rather than a standard laser process, in combination with panel planarization to prevent exposure of the magnetic material to the plating and/or etching solutions/chemistries.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.