Through-substrate underfill formation for an integrated circuit assembly

US12341121B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Eng Huat Goh · Air Itam, MY
• Kyle Robert Davidson · Noblesville, US
• Min Suet Lim · Kampung Bukit Kechil, MY
• Kevin Byrd · Portland, US
• James A. Wade · Alexander City, US

Key dates

• Filing date: Dec 7, 2020
• Grant date: Jun 24, 2025
• Expiry date: Oct 18, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3025
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An integrated circuit package may be fabricated by disposing an underfill material between an electronic substrate and an integrated circuit device through an opening in the electronic substrate. In one embodiment, an integrated circuit assembly may include an electronic substrate having a first surface and an opposing second surface, wherein the electronic substrate includes at least one opening extending from the first surface to the second surface. The integrated circuit assembly may further include an integrated circuit device, wherein the integrated circuit device is electrically attached to the electronic substrate with at least one interconnect, and an underfill material may be disposed between the first surface of the electronic substrate and the integrated circuit device, wherein a portion of the underfill material extends into the opening in the electronic substrate.