Memory forming method and memory

US12342535B2 · kind B2 · utility

Assignee

• CHANGXIN MEMORY TECHNOLOGIES, INC. · CN

Inventors

• Lingguo Zhang · Hefei, CN
• Lintao Zhang · Beijing, CN
• Thomas Jongwan Kwon · Dublin, US
• Xiangui Zhou · Hefei, CN
• Xu Liu · Nanhu, CN

Key dates

• Filing date: Sep 15, 2020
• Grant date: Jun 24, 2025
• Expiry date: May 17, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/482

Abstract

Some embodiments of the present application provide a memory forming method and a memory. The method includes: providing a substrate including at least word line structures and active regions, and bottom dielectric layers and bit line contact layers located on a top surface of the substrate, the bottom dielectric layer having bit line contact openings exposing the active regions in the substrate, and the bit line contact layers covering the bottom dielectric layers and filling the bit line contact openings; etching part of the bit line contact layers to form the bit line contact layers of different heights; forming conductive layers, top surfaces of the conductive layers being at the same height in a direction perpendicular to an extension direction of the word line structures; and the top surfaces of the conductive layers being at different heights in the extension direction of the word line structures; forming top dielectric layers.