Semiconductor structure and forming method thereof
US12342564B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Mar 17, 2022 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Dec 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure and a method are provided. The method includes patterning a substrate to form a first fin structure in a first region and a second fin structure in a second region, wherein a first width of the first fin structure is greater than a second width of the second fin structure; forming a protecting layer on the second fin structure; and forming a first oxide layer over the first fin structure and forming a second oxide layer over the protecting layer, wherein a width of the first oxide layer is greater than a width of the second oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.