Wafer inspection method and inspection apparatus
US12345741B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2022 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Feb 9, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2868
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A wafer inspection method and inspection apparatus that perform a voltage inspection of a die on a wafer by a probe module. The probe module includes a processing module, a first probe coupled to a first electrode point of the die, and a second probe coupled to a second electrode point of the die. The first probe is coupled to the processing module, and the second probe is grounded. The processing module provides the die with a driving current through the first probe, and obtains an inspection voltage corresponding to the die. The processing module generates an inspection result of the inspection voltage based on two reference voltages respectively representing a high critical threshold value and a low critical threshold value of the die under a normal operation. The inspection result indicates an operating status of the die. Thus, inspection costs are reduced and inspection efficiency is enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.