Patent · US Active

Enabling stripe-based operations for error recovery at a memory sub-system

US12346574B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 31, 2023
Grant dateJul 1, 2025
Priority date
Expiry dateAug 31, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1435
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A stripe-based command pertaining to a set of host data items at management units (MUs) of a memory sub-system configured to support non-stripe based commands is received. A set of operations to be executed at the MUs based on the stripe-based command is determined. The set of operations include one or more first operations associated with the set of host data items, the one or more first operations having a first type, and one or more second operations associated with the set of host data items, the one or more second operations having a second type. A first set of commands corresponding to the one or more first operations and a second set of commands corresponding to the one or more second operations is executed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.