Patent · US Active

Dynamic updates to logical-to-physical address translation table bitmaps

US12360914B2 · kind B2 · utility

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1References
20Claims
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Key dates

Filing dateJan 31, 2024
Grant dateJul 15, 2025
Priority date
Expiry dateJan 31, 2044

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7201
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method includes: creating a logical-to-physical address translation (L2P) bitmap for each respective virtual block programmed across a plane of multiple dice of a memory device, each L2P bitmap identifying logical addresses, within each respective L2P table of a plurality of L2P tables, that belong to a respective virtual block; creating a virtual block (VB) bitmap for each respective L2P table, the VB bitmap identifying virtual blocks to which the respective L2P table points; creating an updated VB bitmap for a first L2P table, of the plurality of L2P tables, based on changes to the first L2P table; determining that an entry in the VB bitmap is different than the entry in the updated VB bitmap, the entry corresponding to a particular virtual block; and identifying and updating, by the processing device, an L2P bitmap associated with the particular virtual block for an L2P mapping corresponding to the entry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.