Patent · US Active

Method, control system, and system for machining a semiconductor wafer, and semiconductor wafer

US12381074B2 · kind B2 · utility

0Cited by

1References

15Claims

0Family size

Assignee

Siltronic AG · DE

Inventors

Axel Beyer · Munich, DE
Christof Weber · Burghausen, DE
Stefan WELSCH · Polling, DE

Key dates

Filing date	Jan 23, 2023
Grant date	Aug 5, 2025
Priority date	—
Expiry date	Jun 15, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/02019
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The invention relates to an epitaxially coated semiconductor wafer, processed by a method in which the semiconductor wafer is disposed on a susceptor in a coating apparatus and processed, wherein an etching gas is passed through the coating apparatus in an etching step. A first side of the semiconductor wafer which has been subjected to a polishing operation by CMP, or a second side of the semiconductor wafer opposite the first side, is coated with a protective layer before processing. The resulting wafer has exceptional geometry, as reflected by low ESFQR values.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.