Apparatus with adjustable diagnostic mechanism and methods for operating the same
US12394501B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
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Inventors
Key dates
| Filing date | Apr 20, 2023 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Nov 15, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, apparatuses, and systems may implement adjusted circuit tests. A memory device may include a self-test circuit that is configured to selectively suspend collection and/or processing of test results for one or more portions of the self-test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.