Sense time separation in foggy-fine program to improve optimal VT width
US12399813B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2023 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | Apr 2, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a plurality of memory cells and control circuitry configured to perform a foggy-fine programming operation in which memory cells are programmed in multiple programming passes. To perform the foggy-fine programming operation, the control circuity is configured to perform a first pass of the foggy-fine programming operation on the memory cells, perform, in accordance with a first sense time, a first sensing operation on the memory cells programmed in the first pass of the foggy-fine programming operation, perform a second pass of the foggy-fine programming operation on the memory cells previously programmed in the first pass of the foggy-fine programming operation, and perform, in accordance with a second sense time, a second sensing operation on the memory cells programmed in the first pass and the second pass of the foggy-fine programming operation, wherein the second sense time is different from the first sense time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.