Method for etching for semiconductor fabrication
US12400863B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2022 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | Feb 21, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/32706
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of processing a substrate includes patterning a mask over a dielectric layer and etching openings in the dielectric layer. The dielectric layer is disposed over the substrate. The etching includes flowing an etchant, a polar or H-containing gas, and a phosphorus-halide gas. The method may further include forming contacts by filling the openings with a conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.