Embedded packaging structure and manufacturing method thereof
US12400967B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2022 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | May 3, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15313
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multilayer embedded packaging structure according to an embodiment includes a first dielectric layer and a second dielectric layer on the first dielectric layer. The first dielectric layer includes a first wiring layer. The second dielectric layer includes a first copper pillar layer and a device placement port frame penetrating through the second dielectric layer in a height direction, and a second wiring layer on the first copper pillar layer. A second copper pillar layer is on the second wiring layer. The first wiring layer and the second wiring layer are conductively connected via the first copper pillar layer. A first device is mounted to the bottom of the device placement port frame, a second device is mounted to the second dielectric layer, and a third device is mounted to an end of the second copper pillar layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.