Semiconductor structure and manufacturing method thereof
US12402367B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2022 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | Nov 5, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a semiconductor structure and a manufacturing method thereof. The manufacturing method of the semiconductor structure includes the following. A gate structure is formed on a substrate. A tilt implanting process is performed to implant group IV elements into the substrate to form a doped region, and the doped region is located on two sides of the gate structure and partially located under the gate structure. A part of the substrate on two sides of the gate structure is removed to form a first recess. A cleaning process is performed on the surface of the first recess. A wet etching process is performed on the first recess to form a second recess. A semiconductor layer is formed in the second recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.