Memory location mapping and unmapping
US12406747B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2023 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Mar 15, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a memory circuit is disclosed. The memory circuit includes a memory array having a memory portion and a spare portion. The method includes receiving a first write command to a first memory address, where the first memory address has a status of being mapped to a first spare memory address, and where the first memory address corresponds to a first memory location in the memory portion and the first spare memory address corresponds to a first spare memory location in the spare portion. The method also includes performing, in response to the first write command, a first write operation by attempting to write first data to the first memory location, determining if the first write operation is successful, and unmapping, in response to the first write operation of being successful, the first memory address from the first spare memory address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.