Inventor · Sunnyvale, CA, US

Shivananda Shetty

31Patents
3h-index
37Co-inventors
63Inventor score

Filing activity: Nov 5, 2002 → May 8, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US6815233B1 Method of simultaneous display of die and wafer characterization in integrated circuit technology development Electricity 4 Expired
US7137085B1 Wafer level global bitmap characterization in integrated circuit technology development Physics 4 Expired
US7634127B1 Efficient storage of fail data to aid in fault isolation Physics 4 Expired
US8724388B2 Adaptively programming or erasing flash memory blocks Physics 3 Active
US10068912B1 Method of reducing charge loss in non-volatile memories Electricity 3 Active
US9881683B1 Suppression of program disturb with bit line and select gate voltage regulation Physics 3 Active
US9997253B1 Non-volatile memory array with memory gate line and source line scrambling Electricity 2 Active
US10685724B2 Suppression of program disturb with bit line and select gate voltage regulation Physics 2 Active
US7155652B1 Digital signal processing for real time classification of failure bitmaps in integrated circuit technology development Physics 2 Expired
US7263451B1 Method and apparatus for correlating semiconductor process data with known prior process data Physics 1 Expired
US10229745B2 Suppression of program disturb with bit line and select gate voltage regulation Physics 1 Active
US6907379B1 System and method for processing tester information and visualization for parameter with multiple distributions in integrated circuit technology development Physics 1 Expired
US8995198B1 Multi-pass soft programming Physics 1 Active
US11567691B2 Continuous monotonic counter for memory devices Physics 1 Active
US7099789B1 Characterizing distribution signatures in integrated circuit technology Physics 1 Expired
US7197435B1 Method and apparatus for using clustering method to analyze semiconductor devices Physics 1 Expired
US11978528B2 Dynamic sensing levels for nonvolatile memory devices Physics 0 Active
US6941529B1 Method and system for using emission microscopy in physical verification of memory device architecture Physics 0 Expired
US10446245B2 Non-volatile memory array with memory gate line and source line scrambling Electricity 0 Active
US6864107B1 Determination of nonphotolithographic wafer process-splits in integrated circuit technology development Electricity 0 Expired
US11081194B2 Suppression of program disturb with bit line and select gate voltage regulation Physics 0 Active
US12131055B2 Continuous monotonic counter for memory devices Physics 0 Active
US6766265B2 Processing tester information by trellising in integrated circuit technology development Physics 0 Expired
US10192627B2 Non-volatile memory array with memory gate line and source line scrambling Electricity 0 Active
US10957703B2 Method of reducing charge loss in non-volatile memories Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.