Patent · US Active

Semiconductor package

US12431474B2 · kind B2 · utility

0Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 28, 2022
Grant dateSep 30, 2025
Priority date
Expiry dateJan 6, 2044

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2225/1058
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Provided is a semiconductor package, including a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, first bumps between the first redistribution substrate and the first semiconductor chip, a conductive structure on the first redistribution substrate and spaced apart from the first semiconductor chip, a second redistribution substrate on the first semiconductor chip, second bumps between the first semiconductor chip and the second redistribution substrate, a second semiconductor chip on the second redistribution substrate, a first mold layer between the first redistribution substrate and the second redistribution substrate, and on the first semiconductor chip, and a second mold layer on the second redistribution substrate and the second semiconductor chip, and spaced apart from the first mold layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.