SSD with reference clock loss tolerant oscillator
US12431909B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Oct 29, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of a storage device are provided for producing an oscillator clock from a host reference clock in a storage device lacking a crystal oscillator. The storage device includes a memory die, and an oscillator circuit that generates a clock based on a host reference clock and outputs an output clock to the memory die. While the host reference clock is available, the output clock includes a frequency that is identical to a frequency or a frequency division factor of the host reference clock. In response to loss of the host reference clock, the oscillator circuit reduces the frequency of the output clock to a frequency of the generated clock within a clock cycle following the loss of the host reference clock. In response to re-availability of the host reference clock, the oscillator circuit increases the frequency of the output clock back to the frequency of the host reference clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.