Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same

US4203158A · kind A · utility

Assignee

• Intel Corporation · US

Inventors

• Dov Frohman-Bentchkowsky · Haifa, IL
• Jerry Mar · Sunnyvale, US
• George Perlegos · Fremont, US
• William S. Johnson · Scottsdale, US

Key dates

• Filing date: Dec 15, 1978
• Grant date: May 13, 1980
• Expiry date: Dec 15, 1998

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/683

Abstract

An electrically programmable and electrically erasable MOS memory device suitable for high density integrated circuit memories is disclosed. Carriers are tunneled between a floating conductive gate and a doped region in the substrate to program and erase the device. A minimum area of thin oxide (70 A-200 A) is used to separate this doped region from the floating gate. In one embodiment, a second layer of polysilicon is used to protect the thin oxide region during certain processing steps.