Electrically alterable read-mostly memory
US4266283A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 1979 |
| Grant date | May 5, 1981 |
| Priority date | — |
| Expiry date | Feb 16, 1999 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically alterable read-mostly MOS memory (commonly referred to as E.sup.2 PROM) employing floating gate memory devices is described. Each word stored in memory may be separately accessed for reading and writing. The memory array is arranged with additional lines and selection means to prevent the high-level programming signals from the X-decoders from programming all the floating gate devices along a selected X-line. A high voltage circuit is described which permits the handling of potentials greater than the grounded gate breakdown voltage associated with the shallow junction devices used in the memory. A unique sensing amplifier is also disclosed which detects low currents at high speeds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.