Semiconductor device with high density low temperature deposited Si.sub.w N.sub.x H.sub.y O.sub.z passivating layer
US4365264A · kind A · utility
62Cited by
5References
5Claims
0Family size
Assignee
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Key dates
| Filing date | May 19, 1981 |
| Grant date | Dec 21, 1982 |
| Priority date | — |
| Expiry date | May 19, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a passivation layer disposed on a semiconductor body having at least one circuit element therein. This layer is made of a silicon nitride material containing 0.8-5.9 weight-% of H, together with 61-70 weight-% of Si, 25-37 weight-% of N and up to 0.6 weight-% of O and has a density of 2.9-3.05 gr/cm.sup.3.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.