Process of making dual well CMOS semiconductor structure with aligned field-dopings using single masking step

US4558508A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Wayne Kinney · Emmett, US
• Charles W. Koburger, III · Delmar, US
• Jerome B. Lasky · South Burlington, US
• Larry A. Nesbit · Williston, US
• Ronald R. Troutman · Saint Johnsbury Center, US
• Francis R. White · Saint Johnsbury Center, US

Key dates

• Filing date: Oct 15, 1984
• Grant date: Dec 17, 1985
• Expiry date: Oct 15, 2004

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/157
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process for making a CMOS dual-well semiconductor structure with field isolation doping, wherein only a single lithographic masking step is required for providing self-alignment both of the wells to each other and also of the field isolation doping regions to the wells. The lithographic masking step forms a well mask and defines an oxidation barrier which acts as: an implant mask (absorber) during the ion-implantation of a field dopant of one type; an oxidation barrier over one well during the oxidation of the opposite-type well to form over the one well a sacrificial oxide layer which forms the alignment marks for subsequent formation of the field-doping regions; and a dopant-transmitter during the ion-implantation of an opposite-type field dopant which is simultaneously absorbed by the sacrificial oxide. As a result, there are formed field-doped oxide layers self-aligned to the wells so that, with a subsequent masking step, oxide field isolations are defined over the doped oxide layers. A heat cycle is then used to drive the field dopants into the corresponding field-doping regions.