Bidirectional power FET with integral avalanche protection
US4577208A · kind A · utility
11Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1982 |
| Grant date | Mar 18, 1986 |
| Priority date | — |
| Expiry date | Sep 23, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/378
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Lateral FET structure is disclosed for bidirectional power switching, including AC application. Integral avalanche protection is provided by a pair of isolation regions forming protective barrier junctions with a common layer, which junctions are in parallel with the reverse blocking junctions of the power FET in the OFF state and have a lower reverse breakover threshold for protecting the latter. A plurality of integrated FETs each have left and right source regions and left and right channel regions with a common drift region therebetween, and conduct current in either direction according to the polarity of main terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.