Non-volatile dynamic RAM cell
US4611309A · kind A · utility
34Cited by
2References
40Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1984 |
| Grant date | Sep 9, 1986 |
| Priority date | — |
| Expiry date | Sep 24, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile dynamic RAM circuit where each memory cell includes an access transistor, a floating gate structure, and a recall transistor connected in series between an I/O bit line and a common line. A conducting plate and storage node of the floating gate structure functions as the volatile storage element of the cell and the floating gate functions as the non-volatile storage element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.