Lateral bidirectional power FET with notched multi-channel stacking and with dual gate reference terminal means
US4622569A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1984 |
| Grant date | Nov 11, 1986 |
| Priority date | — |
| Expiry date | Jun 8, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/307
Abstract
A lateral bidirectional power FET (2) has a common drift region (6) between first and second stacks (8, 10) of alternating conductivity type layers (12-17 and 18-23). A notch (38) extends vertically downwardly into the drift region and laterally separates the stacks above the drift region. The stacks include a plurality of channel-containing regions (12-14 and 18-20) interleaved with a plurality of source regions (15-17 and 21-23). In the ON state, bidirectional current flows serially through the source regions and channels of each stack and through the drift region. In the OFF state, voltage is dropped across the plurality of junctions in series in the stacks, and the respective junctions with the drift region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.