Shallow groove capacitor fabrication method
US4650544A · kind A · utility
46Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1985 |
| Grant date | Mar 17, 1987 |
| Priority date | — |
| Expiry date | Apr 19, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/665
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A shallow capacitor cell is formed by using conventional integrated circuit processes to build a substrate mask having sublithographic dimensions. Multiple grooves, or trenches, are etched into the substrate using this mask. The capacitor dielectric layer and plate are then formed in the grooves.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.