Method for the manufacture of semiconductor devices with planar junctions having a variable charge concentration and a very high breakdown voltage
US4667393A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 1985 |
| Grant date | May 26, 1987 |
| Priority date | — |
| Expiry date | Aug 21, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/965
Abstract
The invention relates to a method for the manufacture of high voltage semiconductor devices with at least one planar junction with a variable charge concentration. The method consists in doping with impurities of a same type, in a region of monocrystalline semiconductor material, a first zone, and then a second zone which comprises the first, and so on, and in carrying out a subsequent heat treatment so as to provide a planar junction with a stepped profile and a concentration of impurities which decreases from the center to the periphery in a predetemined range. In this way the intensity of the surface electric field, when the junction is reverse biased, is reduced as a result of which it is possible to provide planar junctions having very high breakdown voltages of some thousands of volts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.