Multi-channel power JFET with buried field shaping regions
US4670764A · kind A · utility
14Cited by
11References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 4, 1986 |
| Grant date | Jun 2, 1987 |
| Priority date | — |
| Expiry date | Apr 4, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/328
Abstract
A power JFET (2) has a stack (4) of alternating conductivity type layers (5-9) forming a plurality of channels (6, 8). The JFET has an ON state conducting bidirectional current horizontally through the channels. The channels are stacked vertically, and the JFET has an OFF state blocking current flow through the channels due to vertical depletion pinch-off. Various main and gate terminal and drift region structures are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.