Dynamic random access memory cell having a charge amplifier
US4677589A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1985 |
| Grant date | Jun 30, 1987 |
| Priority date | — |
| Expiry date | Jul 26, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved dynamic random access memory (DRAM) cell circuit (46) having a charge amplifier is presented. The improvement comprises a bipolar amplification means (64) for amplifying a charge as it is read out of the memory cell (46). According to one embodiment of the present invention, in addition to a standard charge storage capacitor (50) and MOS transistor (48), the memory cell (46) also includes a write control line (60) and a second MOS transistor (62) for writing a "1" bit of information into the memory cell (46). These improvements require little or no additional space when used in a DRAM circuit and allow a reduction in the required capacitor area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.