Topside sealing of integrated circuit device
US4686559A · kind A · utility
8Cited by
4References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 3, 1984 |
| Grant date | Aug 11, 1987 |
| Priority date | — |
| Expiry date | Aug 3, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved topside sealing of integrated circuit devices is disclosed which provided for hermetically sealing the top surface of the device comprising depositing a sealing layer of a nitride compound directly on the surface to be sealed. In a preferred embodiment, a protective layer may then be deposited over the nitride layer without any intervening masking steps being necessary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.