dRAM cell and method

US4713678A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Richard Womack · Albuquerque, US
• Sanjay Banerjee · Austin, US
• Hisashi Shichijo · Plano, US
• Satwinder S. Malhi · Garland, US

Key dates

• Filing date: Nov 13, 1986
• Grant date: Dec 15, 1987
• Expiry date: Nov 13, 2006

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/395

Abstract

A dRAM cell and array of cells, together with a method of fabrication, are disclosed wherein the cell includes one field effect transistor and one storage capacitor with the capacitor formed in a trench in a substrate and the transistor channel formed by epitaxial growth on the substrate. The transistor source and drain are insulated from the substrate, and the transistor may be adjacent the trench or on the upper portion of the trench sidewalls. Signal charge is stored on the capacitor plate insulated from the substrate.