Manufacturing integrated circuits containing P-channel MOS transistors and bipolar transistors utilizing boron and arsenic as dopants
US4721686A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 1987 |
| Grant date | Jan 26, 1988 |
| Priority date | — |
| Expiry date | Jan 22, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This method, requiring a smaller number of masking steps with respect to the known methods, comprises boron implant on the surface of an epitaxial layer, without masking, and arsenic implant in predetermined locations of the epitaxial layer surface by means of an appropriate mask. A subsequent thermal treatment then leads to diffusion of the implanted arsenic and boron atoms, but boron diffusion in the regions in which arsenic implant has also occurred is prevented by the interaction with the latter, to thereby obtain regions with an N.sup.+ type conductivity where both boron and arsenic have been implanted and regions of P type conductivity where only boron has been implanted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.