Insulated gate transistor array
US4779123A · kind A · utility
20Cited by
8References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 1985 |
| Grant date | Oct 18, 1988 |
| Priority date | — |
| Expiry date | Dec 13, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
An insulated gate transistor (70) modified to increase its latching current density. On one side of gate (22), a high conductivity collector well (76) is provided to divert current which would otherwise flow through collector well (24) in a critical path (50) along source-collector junction (27), tending to forward bias the junction and cause the transistor to latch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.