Method and apparatus for testing EPROM type semiconductor devices during burn-in
US4799021A · kind A · utility
17Cited by
4References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 15, 1987 |
| Grant date | Jan 17, 1989 |
| Priority date | — |
| Expiry date | Jul 15, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and a relative method which permit carrying out a complete cycle of functional tests and parametric measurements on EPROM type semiconductor devices during their permanence inside a burn-in chamber, thus greatly reducing the time necessary for testing and classifying the devices, besides ensuring a higher reliability. The system utilizes special "intelligent" cards, i.e. provided with a card microprocessor which may be connected to a supervisory system's CPU directing the test and classification process of the devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.