Method for making bipolar and CMOS integrated circuit structures
US4800171A · kind A · utility
23Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 2, 1987 |
| Grant date | Jan 24, 1989 |
| Priority date | — |
| Expiry date | Oct 2, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/124
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved method is described for constructing one or more integrated circuit components including bipolar and MOS devices on a silicon substrate without damaging areas of the substrate wherein active elements of the integrated circuit components will be formed. The method comprises forming multilayer pedestals of masking materials over the active regions of the substrate and subsequently removing these masking materials using wet etching to avoid damage to the substrate by dry etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.