Inventor · Seattle, WA, US

Mammen Thomas

79Patents
18h-index
30Co-inventors
84Inventor score

Filing activity: Dec 22, 1983 → Dec 23, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US5182632A High density multichip package with interconnect structure and heatsink Electricity 125 Expired
US5223741A Package for an integrated circuit structure Electricity 58 Expired
US5506431A Double poly trenched channel accelerated tunneling electron (DPT-CATE) cell, for memory applications Electricity 51 Expired
US5502315A Electrically programmable interconnect structure having a PECVD amorphous silicon element Electricity 50 Expired
US4639288A Process for formation of trench in integrated circuit structure using isotropic and anisotropic etching Electricity 47 Expired
US5691949A Very high density wafer scale device architecture Electricity 45 Expired
US4808548A Method of making bipolar and MOS devices on same integrated circuit substrate Emerging Cross-Sectional Technologies 45 Expired
US4616404A Method of making improved lateral polysilicon diode by treating plasma etched sidewalls to remove defects Emerging Cross-Sectional Technologies 35 Expired
US5252507A Very high density wafer scale device architecture Physics 31 Expired
US5780919A Electrically programmable interconnect structure having a PECVD amorphous silicon element Electricity 29 Expired
US4922318A Bipolar and MOS devices fabricated on same integrated circuit substrate Emerging Cross-Sectional Technologies 28 Expired
US5675161A Channel accelerated tunneling electron cell, with a select region incorporated, for high density low power applications Electricity 26 Expired
US4707456A Method of making a planar structure containing MOS and bipolar transistors Electricity 25 Expired
US4800171A Method for making bipolar and CMOS integrated circuit structures Emerging Cross-Sectional Technologies 23 Expired
US5315130A Very high density wafer scale device architecture Electricity 20 Expired
US4481070A Double planarization process for multilayer metallization of integrated circuit structures Electricity 20 Expired
US4929992A MOS transistor construction with self aligned silicided contacts to gate, source, and drain regions Emerging Cross-Sectional Technologies 20 Expired
US4468285A Plasma etch process for single-crystal silicon with improved selectivity to silicon dioxide Electricity 19 Expired
US4789760A Via in a planarized dielectric and process for producing same Electricity 17 Expired
US5514884A Very high density wafer scale device architecture Electricity 16 Expired
US4686763A Method of making a planar polysilicon bipolar device Electricity 15 Expired
US7206857B1 Method and apparatus for a network processor having an architecture that supports burst writes and/or reads Electricity 14 Expired
US4669180A Method of forming emitter coupled logic bipolar memory cell using polysilicon Schottky diodes for coupling Emerging Cross-Sectional Technologies 14 Expired
US4682409A Fast bipolar transistor for integrated circuit structure and method for forming same Emerging Cross-Sectional Technologies 13 Expired
US4456501A Process for dislocation-free slot isolations in device fabrication Electricity 12 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.