Bipolar and MOS devices fabricated on same integrated circuit substrate
US4922318A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 1985 |
| Grant date | May 1, 1990 |
| Priority date | — |
| Expiry date | Sep 18, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved integrated circuit structure is disclosed comprising bipolar and MOS devices formed on the same substrate. The bipolar devices have at least the emitter and the collector contact portions formed from a polysilicon layer which results in raised contacts. The MOS devices are similarly formed with raised gate contact portions formed from the same polysilicon layer. Metal silicide is formed over at least a portion of the base, source, and drain regions to provide conductive paths to the base, source, and drain contacts. In one embodiment, the base, source, and drain contacts are also formed from the same polysilicon layer to permit formation of a highly planarized structure with self-aligned contacts formed by planarizing an insulating layer formed over the structure sufficiently to expose the upper surface of the contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.