MOS transistor construction with self aligned silicided contacts to gate, source, and drain regions
US4929992A · kind A · utility
20Cited by
9References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 1986 |
| Grant date | May 29, 1990 |
| Priority date | — |
| Expiry date | Jun 2, 2006 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved integrated circuit structure is disclosed comprising MOS devices formed with at least raised polysilicon gate contact portions. Metal silicide is formed over at least a portion of the source and drain regions to provide conductive paths to the source and drain contacts. In a preferred embodiment, the source and drain contacts also comprise raised contacts which are also formed from the same polysilicon layer to permit formation of a highly planarized structure with self-aligned contacts formed by planarizing an insulating layer formed over the structure sufficiently to expose the upper surface of all of the contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.