Anodizable strain layer for SOI semiconductor structures

US4982263A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• David B. Spratt · Plano, US
• Eldon J. Zorinsky · Plano, US
• Robert L. Virkus · Garland, US
• Kenneth E. Bean · Richardson, US
• Richard L. Yeakley · Dallas, US

Key dates

• Filing date: Mar 10, 1989
• Grant date: Jan 1, 1991
• Expiry date: Mar 10, 2009

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/96
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A silicon on insulator semiconductor structure employs a strain layer fabricated of an electrically inactive material. The strain layer comprises silicon with a germanium additive to produce a sublayer exhibiting a low breakdown voltage and thus effective for selective anodization.