Amorphous-silicon thin film transistor array substrate
US5005056A · kind A · utility
14Cited by
1References
7Claims
0Family size
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Key dates
| Filing date | Feb 3, 1989 |
| Grant date | Apr 2, 1991 |
| Priority date | — |
| Expiry date | Feb 3, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2202/103
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A reverse staggered amorphous-silicon thin film transistor array substrate includes amorphous silicon thin film transistors in an array, gate wirings interconnecting the gate electrodes of the transistors, and source wirings of a transparent conductive layer connecting the source electrodes. An auxiliary source wiring of the material of the source electrodes of said transistors is provided under the source wiring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.