EEPROM semiconductor memory device
US5017979A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1989 |
| Grant date | May 21, 1991 |
| Priority date | — |
| Expiry date | Apr 28, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.