Semiconductor integrated circuit device and process for fabricating the same
US5079611A · kind A · utility
11Cited by
1References
39Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 18, 1990 |
| Grant date | Jan 7, 1992 |
| Priority date | — |
| Expiry date | Oct 18, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/904
Abstract
Herein disclosed is a semiconductor integrated circuit device having a SRAM, in which two MISFETs of a flip-flop circuit of a memory cell are connected directly with an n.sup.+ -type drain region so that they are cross coupled; and in which a p.sup.+ -type semiconductor region is formed below a direct contact part by making use of the mask used in the step of forming contact holes for the direct contact part. The p.sup.+ -type semiconductor region aids as a barrier to prevent soft errors of the SRAM due to .alpha.-particles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.