Process for manufacturing vertical dynamic random access memories
US5106775A · kind A · utility
405Cited by
11References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1990 |
| Grant date | Apr 21, 1992 |
| Priority date | — |
| Expiry date | Jul 30, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/68
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory comprises a switching device and a charge-storage device disposed at the upper and lower sides, respectively, of each of semiconductor islands. The islands are formed on a semiconductor substrate that is completely isolated from the semiconductor substrate by an insulator. The switching device and charge-storage device are substantially the same width. The memory cell structure is extremely small. The cell structure is highly resistant to alpha-particles and is formed self-aligned. During manufacture, the SiO.sub.2 island is oxidized adjacent its lower end to insulate the island from the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.