Silicon thin film transistor with an intrinsic silicon active layer formed within the boundary defined by the edges of the gate electrode and the impurity containing silicon layer
US5111261A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Aug 8, 1990 |
| Grant date | May 5, 1992 |
| Priority date | — |
| Expiry date | Aug 8, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6746
Abstract
A silicon thin film transistor array includes a plurality of silicon thin film transistors in an array-like form, each silicon thin film transistor including an insulating substrate, a gate electrode formed on the insulating substrate, a gate insulating layer formed on the insulating substrate containing the gate electrode, a pair of first impurity contained silicon layers formed on the gate insulating layer in such a manner as to transversely cross a terminal part of the gate electrode, an intrinsic silicon layer formed on the pair of first impurity contained silicon layers and on the gate insulating layer between the pair of first impurity contained silicon layers in such a manner as to connect the pair of first impurity contained silicon layers, a protective insulation layer formed on the intrinsic silicon layer, and a source electrode and a drain electrode formed at contact parts of the pair of first impurity contained silicon layers; gate wiring for connecting the gate electrodes of the silicon thin film transistors to each other; and source wiring for connecting the source electrodes of the silicon thin film transistors to each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.