Method for producing reverse staggered type silicon thin film transistor
US5114869A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | May 26, 1989 |
| Grant date | May 19, 1992 |
| Priority date | — |
| Expiry date | May 26, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/919
Abstract
A method for producing a reverse staggered type silicon thin film transistor includes the steps of forming a gate insulating layer on a substrate having a gate electrode, the gate insulating layer having a transistor-forming portion; forming an intrinsic silicon film on the transistor-forming portion of the gate insulating layer; forming an n-type silicon layer on the intrinsic silicon layer; forming a source electrode on the n-type silicon layer; forming a drain electrode on the n-type silicon layer; forming a resist layer on the source electrode and drain electrode and having the same shape thereof; subsequently removing a portion of the n-type silicon layer by using the resist layer as a mask, such that there remains a predetermined thickness of the n-type silicon layer; and doping the predetermined thickness of the n-type silicon layer with p-type impurities by using the resist layer as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.