Closed cell transistor with built-in voltage clamp
US5136349A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 1990 |
| Grant date | Aug 4, 1992 |
| Priority date | — |
| Expiry date | Oct 12, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
Abstract
A power transistor takes advantage of the lower breakdown voltage capability of a spherical junction. A clamping region having a spherical shape is provided in the gater region of an enclosed transistor cell. The clamping region has a lower breakdown voltage than do the active portions of the transistor cell. Both a DMOSFET and an IGBT transistor may be provided with the clamping region. The clamping region is a zener diode in the case of the DMOSFET, and is a bipolar junction transistor in the case of the insulated gate bipolar transistor. The clamping region is preferably an island in the center of each cell of a closed cell structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.