Vertically interconnected parallel distributed processor
US5159661A · kind A · utility
226Cited by
4References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1990 |
| Grant date | Oct 27, 1992 |
| Priority date | — |
| Expiry date | Oct 5, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel distributed processor comprises matrices of unit cells arranged in a stacked configuration. Each unit cell includes a chalcogenide body which may be set and reset to a plurality of values of a given physical property. Interconnections between the unit cells are established via the chalcogenide materials and the pattern and strength of the interconnections is determined by the set values of the chalcogenide. The processor is readily adapted to the construction of neural network computing systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.