Method for forming a boron phosphorus silicate glass composite layer on a semiconductor wafer
US5166101A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 1991 |
| Grant date | Nov 24, 1992 |
| Priority date | — |
| Expiry date | Feb 1, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/118
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A composite BPSG insulating and planarizing layer is formed over stepped surfaces of a semiconductor wafer by a novel two step process. The composite BPSG layer is characterized by the absence of discernible voids and a surface which is resistant to loss of boron in a subsequent etching step. The two step deposition process comprises a first step to form a void-free BPSG layer by a CVD deposition using gaseous sources of phosphorus and boron dopants and tetraethylorthosilicate (TEOS) as the source of silicon; and then a second step to form a capping layer of BPSG by a plasma-assisted CVD deposition process while again using gaseous sources of phosphorus and boron dpoants, and TEOS as the source of silicon, to provide a BPSG cap layer having a surface which is non-hygroscopic and resistant to loss of boron by subsequent etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.